中频快速DAGC算法及其FPGA实现

针对中频接收机大动态范围与高灵敏度的要求,提出了一种中频快速数字自动增益控制(DAGC)算法。该算法通过对正交视频信号进行符号判别实现快速幅度检波和门限比较,利用多级双门限分段线性化的方法实现数字对数放大(DLA),结合使用数控衰减器(DCA)扩大中频接收机的输入动态范围。给出了基于FPGA的中频快速DAGC实现方案。实际应用证明,采用该方案的数字化中频接收机在保证接收灵敏度为-58 dBm的情况下,动态范围可达80 dB以上。

A Fast IF DAGC Algorithm and its FPGA Implementation

For the intermediate frequency(IF) receiver''s requirement of large dynamic range and high sensitivity,a fast IF digital automatic gain control(DAGC) algorithm is proposed.It uses sign distinction of orthogonal video signals to realize fast amplitude detection and threshold comparison.A digital logarithmic amplifier(DLA) is realized by using a method of multistage double-threshold partition linearization.A digitally controlled attenuator(DCA) is also used to expand input dynamic range of the IF receiver.The realization scheme of IF DAGC based on FPGA is presented.Practical application has proved that the sensitivity of the digital IF receiver is-58dBm and its dynamic range is more than 80dB.