| 基于FPGA 的1GHz高速采样处理平台设计 |
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| 引用本文： | 杨胜华.基于FPGA 的1GHz高速采样处理平台设计[J].国际商务研究,2007,47(6):163-166. |
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| 作者姓名： | 杨胜华 |
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| 作者单位： | 中国西南技术研究所,成都610036 |
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| 摘 要： | 介绍了一种高速宽带采样的数字信号处理平台设计方法，论述了在XilinxV4 FPGA中如何实现高速同步时钟设计和高速数据同步接收设计，介绍了与该设计相关的一些高速模数混合电路设计方法和一种采样后数据捕获的方法。该设计方案已用于瞬时测频中，并取得了良好的效果。
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| 关 键 词： | 宽带采样 同步时钟 高速数据 同步接收 模数混合电路 |
| 修稿时间： | 2007/7/10 0:00:00 |
Design of a 1GHz High-speed Sampling and Processing Platform with FPGA |
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| YANG Sheng-hua.Design of a 1GHz High-speed Sampling and Processing Platform with FPGA[J].International Business Research,2007,47(6):163-166. |
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| Authors: | YANG Sheng-hua |
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| Abstract: | The design method of a digital signal processing platform for high-speed wideband sampling is introduced.How to design the high-speed synchronization clock and high-speed data synchronization receiving in Xilinx''s V4 FPGA is analyzed.The high speed analog/digital(A/D) mixed circuit design and data capturing method after sampling are also introduced.This scheme has been used in the instantaneous frequency measurement,and the platform works well. |
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| Keywords: | wideband sampling synchronization clock high-speed data synchronization receiving analog/digital(A/D)mixed circuit |
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