| 基于DSP Builder数字滤波器的FPGA设计 |
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| 引用本文： | 雷能芳.基于DSP Builder数字滤波器的FPGA设计[J].价值工程,2011,30(7):141-142. |
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| 作者姓名： | 雷能芳 |
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| 作者单位： | 渭南师范学院,渭南,714000 |
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| 基金项目： | 渭南师范学院重点科研计划项目;项目名称:加热炉温度模糊控制系统研究;项目 |
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| 摘 要： | 现场可编程门阵列(FPGA)器件广泛应用于数字信号处理领域,而使用VHDL或VerilogHDL语言进行设计比较复杂。提出一种采用DSP Builder实现IIR数字滤波器的设计方案,按照Matlab/Simulink/DSP Builder/QuartusⅡ的设计流程,设计了一个4阶IIR低通数字滤波器,并通过QuartusⅡ软件中的嵌入式逻辑分析仪SignalTapⅡ对设计进行了硬件实时测试。结果表明,所设计的IIR数字滤波器功能正确,性能良好。
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| 关 键 词： | FPGA 无限长脉冲响应滤波器 DSP Builder QuartusⅡ |
FPGA Design of Digital Filter Based on DSP Builder |
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| Lei Nengfang.FPGA Design of Digital Filter Based on DSP Builder[J].Value Engineering,2011,30(7):141-142. |
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| Authors: | Lei Nengfang |
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| Institution: | Lei Nengfang(Weinan Teachers University,Weinan 714000,China) |
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| Abstract: | Field Programmable Gate Array （FPGA） devices is widely used in the field of digital signal processing, but it is complicated to design using VHDL or VerilogHDL. A method of designing IIR digital filter based on DSP Builder are pointed out. Then a 4-order low-pass IIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/Quartus Ⅱ, and the practical test was finished based on SignalTap Ⅱ of Quartus Ⅱ software. The result shows the designed filter correct in function and good in performance. |
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| Keywords: | FPGA DSP Builder |
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