射频接收芯片中CMOS晶体振荡器的设计

本文采用0.18um CMOS工艺设计了一种应用于射频接收芯片的4MHz的Pierce晶体振荡器,采用自动增益控制(AGC)结构,提高了频率稳定性,降低了功耗。流片测试结果显示,在1.8V电源电压下,输出频率具有较好的精度,最大的频率误差为0.1%,在1.8V电源电压下,消耗电流500 nA,版图面积为100um×250um,满足射频收发芯片低功耗、高稳定性、和版图面积小的要求。

Design of CMOS Crystal Oscillator in RF Receiver IC

A 4MHz CMOS pierce crystal oscillator for RF receiver is designed in 0.18um CMOS process. An AGC（Automatic gain control） structure is used to improve frequency stability and reduce power consumption. The measurement results show that when the voltage is 1.8V, output frequency has better precision and the most frequency error is 0.1%,the current consumes 500nA,the layout area is 100um×250um, and these can satisfy the RF receiver requirement that low power consumption, high stability and small area .