| 算术逻辑单元硬件设计的前端设计 |
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| 引用本文： | 张玲.算术逻辑单元硬件设计的前端设计[J].黄石理工学院学报,2009,25(1):9-10. |
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| 作者姓名： | 张玲 |
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| 作者单位： | 黄石理工学院,计算机学院,湖北,黄石,435003 |
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| 摘 要： | 采用EDA技术进行了算术逻辑单元硬件设计的前端设计，算术逻辑单元的输入是从指令模块移码来的操作码（Operation code）和待处理的数据。操作码指定了待处理数据需要何种的运算，如常见的加、减、乘以及各种移位运算等。最后通过相关的软件进行彷真得到准确的时序，仿真结果表明，该算术逻辑设计运行准确且稳定。
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| 关 键 词： | 算术逻辑单元 EDA 仿真 |
Front-end Design for the Arithmetic Logical Unit |
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| ZHANG Ling.Front-end Design for the Arithmetic Logical Unit[J].Journal of Huangshi Institute of Technology,2009,25(1):9-10. |
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| Authors: | ZHANG Ling |
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| Institution: | School of Computer Science;Huangshi Institute of Technology;Huangshi Hubei 435003 |
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| Abstract: | The Front-end design of ALU hardware is done by using EDA technique.The inputs of this ALU are disposing data and operation code which is gained from the shifting of the instruction module.The operation code is used to choose the operation type such as adding,subtracting,multiplying and shifting.lastly,the exact timing sequence is obtained by simulation.The final simulation results indicate that the operation of this design is credible and stable. |
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| Keywords: | EDA |
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