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TD-LTE多带宽数字下变频设计与FPGA实现
引用本文:田增山,李 路.TD-LTE多带宽数字下变频设计与FPGA实现[J].国际商务研究,2016,56(7).
作者姓名:田增山  李 路
作者单位:重庆邮电大学 移动通信技术重庆市重点实验室,重庆 400065;重庆邮电大学 移动通信技术重庆市重点实验室,重庆 400065
摘    要:分时长期演进(TD-LTE)系统为了满足各种环境的需要,支持6种不同的带宽和基带速率。为了满足TD-LTE系统多带宽和多速率的要求,设计了一种兼容TD-LTE多带宽和多速率的多带宽数字下变频方案。方案中采用了时分复用技术、抽取滤波的合理搭配和高性能滤波器实现了资源优化和输出信号的高信噪比。此外,对数字混频器和抗混叠滤波器进行改进,设计出了基于坐标旋转数字计算法(CORDIC)的流水线型混频器和高速并行可配置滤波器。软件仿真和硬件测试证明了TD-LTE多带宽数字下变频的正确性,且具有灵活性、高性能和低资源消耗的特点以及较高的工程实用价值。

关 键 词:分时长期演进系统  数字下变频  多带宽  数字混频器  抗混叠滤波器  现场可编程门阵列

Design and FPGA implementation of multi-bandwidth digital down converter in TD-LTE system
TIAN Zengshan and LI Lu.Design and FPGA implementation of multi-bandwidth digital down converter in TD-LTE system[J].International Business Research,2016,56(7).
Authors:TIAN Zengshan and LI Lu
Abstract:Time division-long term evolution(TD-LTE) system needs to support six different bandwidths and baseband rates,in order to satisfy the requirements of various environments.To meet the demand of multi-bandwidth and multi-rate in TD-LTE system,a multi-bandwidth digital down converter(DDC) scheme is designed which can support the flexible switch of multi-bandwidth and multi-rate.The proposed scheme takes advantage of the time division multiplexing,the reasonable collocation and the high performance filter techniques to achieve resource optimization and high signal-to-noise ratio(SNR) of output signal.In addition,a parallel Coordinate Rotation Digital Compute(CORDIC) frequency mixer and a high speed parallel configurable filter are proposed by improving the digital mixer and anti-aliasing filter.Software simulations and hardware tests verify the correctness of the multi-bandwidth DDC scheme.And the proposed scheme is featured by flexibility,high performance,low resource consumption and high value for practical engineering.
Keywords:TD-LTE system  digital down converter  multi-bandwidth  digital frequency mixer  anti-aliasing filter  field programmable gate array
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